1. Field of the Invention
The present invention relates to a scheduling method and an information processing system for performing a real-time operation periodically at specific time intervals.
2. Description of the Related Art
Conventionally, computer systems such as server computers have utilized system architecture such as a multiprocessor and a parallel processor in order to improve in throughput. Both of the processors achieve a parallel computing operation using a plurality of processing units.
Jpn. Pat. Appln. KOKAI Publication No. 10-143380 discloses a system having a plurality of processing units. This system includes a single high-speed CPU, a plurality of low-speed CPUs and a shared memory. Processes are assigned to the high-speed and low-speed CPUs in consideration of parallelism and execution time of each process.
Jpn. Pat. Appln. KOKAI Publication No. 8-180025 discloses a scheduling technique of scheduling threads such that the same processor executes threads belonging to the same process.
Not only the computer system but also an embedded device that needs to process a large amount of data such as AV (audio video) data in real time has recently required that system architecture such as a multi-processor and a parallel processor be introduced to improve in throughput.
Under the present circumstances, however, a real-time processing system that is predicated on the above system architecture is hardly reported.
In the real-time processing system, each operation needs completing within the limit of allowed time. In order to perform a real-time operation including a combination of a plurality of chained tasks periodically at specific time intervals, all the chained tasks need completing within the time interval of each period.
Since the real-time processing system is often used as an embedded system, its serious problem is to reduce power consumption. The larger the number of processing units included in the system, the higher the data transfer speed (data transfer bandwidth) needs to be. The greater the data transfer bandwidth, the higher the power consumption. When system architecture such as a multiprocessor and a parallel processor is applied to the real-time processing system, a new mechanism is required to decrease a required data transfer bandwidth while completing a real-time operation within a given period of time.